As shown in FIG. 1, for example, during the manufacturing process of a MOS transistor, after forming a gate stack and source/drain regions 102, it is required to form on the source/drain regions 102 a metal silicide contact, in order to provide a low resistance connection between the source/drain regions of the transistor and a W metal contact hole in the BEOL (Back-end-of-line). The specific steps for forming the metal silicide contact comprise, after forming the source/drain regions, depositing a layer of metal, e.g., a layer of Ni or Ni alloy, on the whole surface of the semiconductor structure (including the gate stack, the spacer 111, the source/drain regions 102 and the STI (Shallow Trench Isolation) 110), and then annealing the resulting structure so that a layer of silicide of Ni 103 (e.g. NiSi) with a certain thickness is formed within the surface of the source/drain regions 102 of the transistor. The layer of silicide of Ni 103 can reduce the source/drain contact resistance. However, the following problems arise during the process. As the transistor scales down, the distance between the gate and the W metal contact hole acting as the source/drain contact hole is becoming smaller, and the distance between the channel region between the source/drain extension regions 108 and the layer of silicide of Ni 103 acting as a contact region scales down. As a result, the probability for Ni in the layer of silicide of Ni 103 and even the excessive Ni in the layer of Ni or Ni alloy 107 deposited on the spacer 111 to enter the channel region through the source/drain extension regions 108 is increased, which forms a leakage path and reduces the yield.
Shown in FIG. 1 are Ni pipes 109 formed in the source/drain extension regions 108 directly under the spacer 111, for example, as indicated by the bold oblique line which goes through the source/drain extension regions 108 from the layer of silicide of Ni 103 to the channel region. The Ni pipes 109 can be considered as the leakage path along which Ni pass.
To this end, there is an urgent need in the art for improvement of the transistor technology.